1. Technical Field
The embodiments described herein relate to a semiconductor integrated circuit and, more particularly, to an apparatus for generating an internal voltage in a semiconductor integrated circuit that increases area efficiency.
2. Related Art
A conventional semiconductor integrated circuit receives power sources, such as an external supply voltage VDD and a ground voltage VSS, and generates an internal voltage, such as an elevated internal voltage VPP and a substrate bias voltage VBB. At this time, the semiconductor integrated circuit sets a target level of the internal voltage and detects whether the internal voltage exceeds the target level. If the internal voltage does not reach the target level, the internal voltage is often pumped to maintain the target level. In order to perform such a function, the semiconductor integrated circuit includes an apparatus for generating the internal voltage. The apparatus includes a voltage detecting unit, an oscillating unit and a voltage pumping unit.
Conventionally, a substrate bias voltage VBB is mainly used as a bulk voltage for NMOS transistors, which is needed to reduce a leakage current. Also, the substrate bias voltage VBB can be applied to a gate terminal of PMOS transistors to overcome a threshold voltage for the PMOS transistors. The substrate bias voltage VBB can be used in a circuit such as a sub word line driver in a conventional semiconductor memory apparatus. Since the characteristics of NMOS transistors are different from that of PMOS transistors. For example, the substrate bias voltage level used for NMOS transistors (hereinafter, referred to as “N-substrate bias voltage”) is different from the substrate bias voltage level used for PMOS transistors (hereinafter, referred to as “P-substrate bias voltage”).
In order to generate the N-substrate bias voltage and the P-substrate bias voltage, each of which is at a different level, a conventional semiconductor integrated circuit includes both a voltage generator for the N-substrate bias voltage and another voltage generator for the P-substrate bias voltage. That is, a conventional semiconductor integrated circuit includes a voltage detecting unit, a ring oscillating unit and a voltage pumping unit for generating the N-substrate bias voltage and a voltage detecting unit, a ring oscillating unit and a voltage pumping unit for generating the P-substrate bias voltage. Since the apparatus for generating each of the N-substrate bias voltage and the P-substrate bias voltage are separately included, the area occupied within the semiconductor integrated circuit is not small.
Particularly, the ring oscillating unit and the voltage pumping unit each occupy large areas. Thus, the for duplicate circuits for generating the substrate bias voltages, which occupy large areas, make it difficult to achieve low power consumption as well as high integration.